TSMC Builds Other People's Chips. It Earns on Being Almost Impossible to Replace.

Heejung Chang

— 6 min read
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In one line: TSMC designs no chips of its own. It sells wafers, and it holds its price because at the leading edge almost no one else can build them at a usable yield. Watch the gross margin, and what the next generation of fabs costs to build.

At a glance

  • Driver: leading-edge capacity few rivals can match at a high yield, which is where its price comes from
  • The one number: gross margin (Q2 2026: 67.7%; Q3 2026 guidance: 65–67%)
  • Biggest risk: building ahead of AI demand that doesn't last. Its 2026 capital spending has been raised to US$60–64 billion.
  • Reports: monthly sales around the 10th of each month; quarterly results in mid-January, April, July, and October

On September 10, TSMC reported the biggest month in its history: about NT$515 billion (about US$16 billion) of revenue in August 2026, up 53% from a year earlier. "AI demand" explains the revenue: US$40.2 billion in Q2 2026 (ended June), with full-year growth now guided slightly above 40% in dollar terms. It does not explain how much of that revenue TSMC keeps. A contract manufacturer that builds other companies' designs earned a gross margin of 67.7% and an operating margin of 60.3% in Q2 2026. Something lets TSMC set its price instead of taking it.

What it sells vs. what it earns on

TSMC is a pure-play foundry. It builds chips that Nvidia, Apple, AMD, Broadcom and hundreds of others design, never under its own name, so it never competes with its customers. What it sells is a finished wafer: a silicon disc with a customer's design etched onto it.

On paper that is a hard business: plants costing tens of billions each, re-equipped every few years, making someone else's product. It works because of the leading edge, the smallest and most advanced circuits. There the difficulty is not owning the machines. The same lithography tools go to Samsung and Intel. The difficulty is running them at a high yield, the share of chips on each wafer that come out usable. TSMC's rivals have repeatedly fallen short on yield at new generations. So for the most advanced chips, most buyers who need them go to TSMC. TSMC held 72.5% of the entire foundry market in Q2 2026 (TrendForce), and a far larger share at the leading edge.

The customers are locked in too. A leading-edge chip is drawn to the exact rules of the factory that builds it, and moving it to another foundry means redrawing much of the design. That holds for the life of that chip. Each new design is a fresh choice, which is why TSMC has to win it again with yield every generation.

What moves the profit

TSMC reshapes the basic profit line (price × quantity, minus cost) into its own:

Profit ≈ (wafer capacity × utilization × price per wafer) − fixed plant cost − materials and power, with yield setting what the customer pays per good chip

The handful of things that move it:

  • Utilization. How full the fabs run. A fab costs almost the same full or half-empty. Not disclosed; like wafer price and yield below, it shows up in the gross margin.
  • Leading-edge mix. The share of revenue from the newest nodes, where capacity is scarcest and prices are highest.
  • Price per wafer. Not disclosed. In July 2026 management said it prefers to "earn our value" rather than suddenly raise prices.
  • Yield. Not disclosed. The customer pays by the wafer, so yield decides what each good chip costs the customer, and how high a wafer price TSMC can hold against rivals.
  • The capital treadmill. Every new node and fab arrives first as a cost: depreciation before it fills, lower yield while it learns. The margin pays for the next generation before it becomes profit.

Reading the earnings: what to watch, and how

TSMC publishes sales monthly and full results quarterly (investor.tsmc.com). Sources that work for any company are gathered in Where to find the numbers.

  • Monthly revenue (around the 10th). Read it: monthly sales are in NT$ and guidance is in US$, so first convert at the exchange rate TSMC assumed in its guidance. Then work out how much each remaining month must bring in to reach the quarter's range, and compare that with recent months. A single month is noisy. Latest: July and August 2026 came to about NT$982 billion (about US$31 billion at NT$32). Reaching Q3 guidance of US$44.6–45.8 billion needs about NT$445–483 billion in September, against NT$468 billion in July and NT$515 billion in August. Q3 is tracking toward the top of the range or above it.
  • Gross margin, against the reasons given for it. Read it: TSMC names in advance what will drag on the margin: a new node ramping, overseas fabs, the exchange rate. A margin that falls by about that much is normal. A margin that falls further with nothing new to explain it points to emptier fabs or weaker pricing. Latest: 67.7% in Q2 2026, with Q3 guided to 65–67%. Management expects the 2-nanometer ramp to cost 3–4 points in the second half of 2026, and overseas fabs 2–4 points over the next several years.
  • Revenue by node and platform. Read it: a rising share from the newest nodes lifts the margin over time. The platform split shows how much the company rides on one market. Latest (Q2 2026): 7nm and smaller made up 77% of wafer revenue (2nm 3%, 3nm 30%). High-performance computing was 66% of revenue, up 20% from Q1, and smartphones were 22%.
  • Capital spending. Read it: a mid-year increase is management betting that demand will last. The spending becomes depreciation later, whether or not the bet pays off. Latest: 2026 capex was raised to US$60–64 billion, up from roughly US$40 billion in 2025.
  • Guidance and its exchange rate. Revenue is mostly in dollars and much of the cost is in Taiwan dollars. TSMC reports in Taiwan dollars, so a stronger Taiwan dollar turns the same dollar sales into fewer Taiwan dollars while those costs stay put. Read it: if the Taiwan dollar is stronger than the rate TSMC assumed, the margin is trimmed even if nothing else changes. The rate moves daily, so it is also an early signal. Latest: Q3 2026 guidance assumes NT$32 to the US dollar.

Leading indicators (outside TSMC's filings)

These often move before TSMC's own numbers.

  • The big cloud buyers' capital spending. Microsoft, Alphabet, Amazon and Meta. Their AI budgets become chip orders, and chip orders become TSMC wafers. (demand)
    • When: quarterly, with each company's earnings in late January, April, July and October. Where: the capex line in their cash-flow statements, and capex guidance on the calls.
  • TSMC's largest customers' guidance. Nvidia, Apple, AMD and Broadcom — TSMC builds what they expect to sell. (demand)
    • When: quarterly, with their results. Where: their revenue guidance and supply-commitment disclosures (Nvidia's purchase commitments, for example).
  • Equipment makers' results. ASML and the other toolmakers ship the machines that become capacity a year or two later, at TSMC and at its rivals. (supply)
    • When: quarterly. Where: ASML's and other equipment makers' results and calls, especially commentary on leading-edge logic.
  • Smartphone shipments. Smartphones are TSMC's second-largest platform after high-performance computing. (demand)
    • When: quarterly. Where: market trackers such as IDC and Counterpoint.

What Wall Street is asking

The same handful of questions came up on the July 2026 call. What each is really probing:

  1. "Can you keep raising capital spending for several years?" Is TSMC building for lasting demand or into an AI peak? A fab built ahead of demand is a fixed cost with nothing to spread over — a mistake this business cannot easily undo.
  2. "Where does gross margin settle as 2-nanometer and the overseas fabs ramp?" Can TSMC pass the higher cost of a new node, and of building in Arizona, Japan and Germany, on to customers? If yes, the dilution is temporary; if not, the margin itself is resetting lower.
  3. "How real is the competition from Samsung and Intel?" Can either reach a yield that gives TSMC's biggest customers a real second source? That is what would erode the pricing power.
  4. "How exposed are you to a few customers?" In 2025 the largest customer was 19% of revenue, the second largest 17%, and the top ten 78% (Form 20-F). A shift by any one of them moves a large share of revenue.
  5. "Is packaging still the bottleneck?" Advanced packaging joins the processor to its memory (a process TSMC calls CoWoS). In July the chief executive said packaging capacity is "so tight that now it's limiting my customers' growth." If packaging is the ceiling, growth is capped by TSMC's own build-out, not by demand — a better problem, but still a cap.

Most of these show up in the gross margin and the capex line before they show up in revenue.

A note on valuation

For TSMC, the question the market prices is where the fabs sit, not only how long the lead lasts. Most leading-edge capacity is in Taiwan, so an earthquake, a blockade or a conflict there would hit most of it at once. The Arizona expansion, with another US$100 billion announced in July 2026, spreads that risk, but it costs margin to do it.

The shape

TSMC is a manufacturing chokepoint: almost the only place most advanced chips can be built at a usable yield. It is paid for being hard to replace, like Nvidia. The difference is that its moat is process knowledge, not software, and it has to be rebuilt with every generation. On an AI chip the two tolls stack. The buyer pays TSMC's price inside Nvidia's. (See: Nvidia Sells Chips. It Earns on Being Hard to Leave.)

 

Want to read any company this way? How a foundry earns on machines while a designer earns on minds is one of many structures laid out industry by industry in the book: Earnings Driver.

Sources: TSMC Q2 2026 results (quarter ended June 30, 2026) and earnings call, July 16, 2026; TSMC monthly revenue reports for July and August 2026; TSMC Form 20-F for 2025; TrendForce foundry rankings, Q2 2026. All at investor.tsmc.com unless noted.

Educational only, not investment advice. Figures as of the periods noted.

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